A memory array may be tested by checking if memory cells of the array can be both set to logical-1 and reset to logical-0. One method of testing writes values to a row of an array and then reads the values back. The parity of the written values is compared with the parity of the read values. A difference in parities indicates a failure of one or more memory cells. However, the method fails when an even number of bits are in error (flipped).
A memory cell may be constructed using an element with a variable impedance. An example is a cell that utilizes Correlated Electron Material (CEM) in a Correlated Electron Switch (CES). Correlated Electron Material (CEM) exhibits an abrupt transition from a conductive/low impedance state to an insulative/high impedance state, the transition arising from electron correlations in a material, rather than from solid state structural phase changes.